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copyright ? 2010 future technology devices international limited 1 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 future technology devices international ltd . ft232r usb uart ic the ft232r is a usb to serial uart interface with the following advanced features: single chip usb to asynchronous serial data transfer interface. entire usb protocol handled on the chip . no usb specific firmware programming required. fully integrated 1024 bit eeprom storing device descriptors and cbus i/o configuration. fully integrated usb termination resistors . fully integrated clock generation with no external crystal required plus optional clock output selection enabling a glue - less interface to ex ternal mcu or fpga. data transfer rates from 300 baud to 3 mbaud (rs422 , rs485 , rs232 ) at ttl levels . 128 byte receive buffer and 256 byte transmit buffer utilising buffer smoothing technology to allow for high data throughput. ftdi?s royalty unique usb ftdichip - id? feature. configurable cbus i/o pins. transmit and receive led drive signals. uart interface support for 7 or 8 data bits, 1 or 2 stop bits and odd / even / mark / space / no parity fifo receive and transmit buffers for high data throughput. synchronous and asynchronous bit bang interface options with rd# and wr# strobes. device supplied pre - programmed with unique usb s erial number. supports bus powered, self powered and high - power bus powered usb configuratio ns. integrated + 3.3v level converter for usb i/o . integrated level converter on uart and cbus for interfacing to between +1.8v and + 5v l ogic. true 5 v /3.3v/2.8v/1.8v cmos drive output and ttl input. configurable i /o pin output drive strength. integrated power - on - reset circuit. fully integrated avcc supply filtering - no external filter ing required. uart signal inversion option. + 3.3v (using external oscillator) to + 5.25v (internal oscillator) single supply operation. low operating and usb suspend current. low usb bandwidth consumption. uhci/ohci/ehci host controller compatible . usb 2.0 full speed compatible. - 40c to 85c extended operating temperature range. available in compact pb - free 28 pin ssop and qfn - 32 packages (both rohs compliant) . neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or re produced in any material or electronic form w ithout the prior written consent of the copyright holder. this product and its documentation are supplied on an as - is basis and no warranty as to their suitability for any particular purpose is either made or implied. future technology devices internationa l ltd will not accept any claim for damages howsoever arising as a result of use or failure of this product. your statutory rights are not affected. this product or any variant of it is not intended for use in any medical appliance, device or system in whi ch the failure of the product might reasonably be expected to result in personal injury. this document provides preliminary information that may be subject to change without notice. no freedom to use patents or other intellectual property rights is implied by the publication of this document. future technology devices international ltd, unit 1, 2 seaward place, centurion business park , glasgow g41 1hh united kingdom. scotland registered company number: sc136640
copyright ? 2010 future technology devices international limited 2 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 1 typical applications usb to rs232/rs422/rs485 converters upgrading legacy peripherals to usb cellular and cordless phone usb data transfer cables and interfaces i nterfacing mcu / pld/fpga based designs to usb usb audio and low bandwidth video data transfer pda to usb data transfer u sb smart card reade rs usb instrumentation usb industrial control usb mp3 player interface usb flash card reader and writers set top box pc - usb interface usb digital camera interface usb hardware modems usb wireless modems usb bar code readers usb software and hardware enc ryption dongles 1.1 driver support royalty free virtual com port (vcp) drivers for... windows 98, 98se, me, 2000, server 2003, xp and server 2008 windows 7 32,64 - bit windows xp and xp 64 - bit windows vista and vista 64 - bit windows xp embedded windows ce 4.2, 5.0 and 6.0 mac os 8/9, os - x linux 2.4 and greater royalty free d2xx direct drivers (usb drivers + dll s/w interface) windows 98, 98se, me, 2000, server 2003, xp and server 2008 windows 7 32,64 - bit windows xp and xp 64 - bit windows vista and vista 64 - bit windows xp embedded windows ce 4.2, 5.0 and 6.0 linux 2.4 and greater the drivers listed above are all available to download for free from ftdi website ( www.ftdichip.com ) . various 3rd party drivers are also available for other operating systems - see ftdi website ( www.ftdichip.com ) for details. for driver installation, please refer to http://www.ftdichip.com/documents/installguides.htm 1.2 part numbers part number package ft232rq - xxxx 32 pin qfn FT232RL - xxxx 28 pin ssop note: packing codes for xxxx is: - reel: taped and reel, (ssop is 2,000pcs per reel, qfn is 6,000pcs per reel). - tube : t ube packing , 47pcs per tube (ssop only) - tray : tray packing , 490pcs per tray (qfn only) for example: ft232rq - reel is 6 ,000pcs taped and reel packing
copyright ? 2010 future technology devices international limited 3 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 1.3 usb compliant the ft232r is fully compliant with the usb 2.0 specification and has been given the usb - if test - id (tid) 40680004 (rev b) and 4 0770018 (rev c) .
copyright ? 2010 future technology devices international limited 4 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 2 ft232r block diagram figure 2 . 1 ft232r block diagram for a description of each function please refer to section 4. x 4 c l o c k m u l t i p l i e r u a r t f i f o c o n t r o l l e r s e r i a l i n t e r f a c e e n g i n e ( s i e ) u s b p r o t o c o l e n g i n e b a u d r a t e g e n e r a t o r u a r t c o n t r o l l e r w i t h p r o g r a m m a b l e s i g n a l i n v e r s i o n 3 . 3 v o l t l d o r e g u l a t o r u s b t r a n s c e i v e r w i t h i n t e g r a t e d s e r i e s r e s i s t o r s a n d 1 . 5 k p u l l - u p u s b d p l l i n t e r n a l 1 2 m h z o s c i l l a t o r 4 8 m h z 4 8 m h z o c s i ( o p t i o n a l ) o s c o ( o p t i o n a l ) u s b d p u s b d m 3 v 3 o u t v c c d b u s 0 d b u s 1 d b u s 2 d b u s 3 d b u s 4 d b u s 5 d b u s 6 d b u s 7 c b u s 0 c b u s 2 c b u s 3 s l e e p # r e s e t # t e s t g n d r e s e t g e n e r a t o r 3 v 3 o u t c b u s 1 f i f o r x b u f f e r f i f o t x b u f f e r i n t e r n a l e e p r o m t o u s b t r a n s e i v e r c e l l c b u s 4
copyright ? 2010 future technology devices international limited 5 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 table of contents 1 typical applications ................................ ................................ ........ 2 1.1 driver support ................................ ................................ .................... 2 1.2 part numbers ................................ ................................ ...................... 2 note: packing codes for xxxx is: ................................ ................................ .. 2 1.3 usb compliant ................................ ................................ .................... 3 2 ft232r block diagram ................................ ................................ .... 4 3 device pin out and signal description ................................ ............ 7 3.1 28 - ld ssop package ................................ ................................ .......... 7 3.2 ssop package pin out description ................................ ...................... 7 3.3 qfn - 32 package ................................ ................................ ............... 10 3.4 qfn - 32 pac kage signal description ................................ .................. 10 3.5 cbus signal options ................................ ................................ ......... 13 4 function description ................................ ................................ ..... 14 4.1 key fe atures ................................ ................................ ..................... 14 4.2 functional block descriptions ................................ ........................... 15 5 devices characteristics and ratings ................................ .............. 17 5.1 absolute maximum ratings ................................ ............................... 17 5.2 dc characteristics ................................ ................................ ............. 18 5.3 eeprom reliability characteristics ................................ ................... 21 5.4 internal clock characteristics ................................ ........................... 21 6 usb power configurations ................................ ............................ 23 6.1 usb bus powered configuration ................................ ...................... 23 6.2 self powered configuration ................................ .............................. 24 6.3 usb bus powered with power switching configuration .................... 25 6.4 usb bus powered with selectable external logic supply .................. 26 7 application examples ................................ ................................ .... 27 7.1 usb to rs232 converter ................................ ................................ ... 27 7.2 us b to rs485 coverter ................................ ................................ ..... 28 7.3 usb to rs422 converter ................................ ................................ ... 29 7.4 usb to mcu uart interface ................................ .............................. 30 7.5 led interface ................................ ................................ .................... 31 7.6 using the external oscillator ................................ ............................ 32 8 internal eeprom configuration ................................ .................... 33 9 package parameters ................................ ................................ ..... 35 9.1 ssop - 28 package dimensions ................................ .......................... 35
copyright ? 2010 future technology devices international limited 6 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 9.2 qfn - 32 package dimensions ................................ ............................ 36 9.3 qfn - 32 package typical pad layout ................................ ................. 37 9.4 qfn - 32 package typical solder paste diagram ................................ . 37 9.5 solder reflow profile ................................ ................................ ........ 38 10 contact information ................................ ................................ ... 39 appendix a C references ................................ ................................ ........... 40 appendix b - list of figures and tables ................................ ..................... 41 appendix c - revision history ................................ ................................ .... 43
copyright ? 2010 future technology devices international limited 7 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 3 device pin out and signal description 3.1 28 - ld ssop package figure 3 . 1 ssop package pin out and schematic symbol 3.2 ssop package pin out description note: the convention used throughout this document for active low signals is the signal name followed by a # pin no. name type description 15 usbdp i/o usb data signal plus, incorporating internal series resistor and 1.5k pull up resistor to 3.3v. 16 usbdm i/o usb data signal minus, incorporating internal series resistor. table 3 . 1 usb interface group pin no. name type description 4 vccio pwr +1.8v to +5.25v supply to the uart interface and cbus group pins (1...3, 5, 6, 9...14, 22, 23). in usb bus powered designs connect this pin to 3v3out pin to drive out at +3.3v levels, or connect to vcc to drive out at 5v cmos level. this pin can also be supplied with an external +1.8v to +2.8v supply in order to drive outputs at lower levels. it should be noted that in this case this supply should originate from the same source as the supply to vcc. this means that in bus powered designs a regulator which is supplied by the +5v on the usb bus should be us ed. 7, 1 8, 21 gnd pwr device ground supply pins u s b d p u s b d m 3 v 3 o u t g n d r e s e t # v c c g n d n c a g n d t e s t o s c i o s c o c b u s 1 c b u s 0 t x d r t s # r x d d t r # v c c i o r i # g n d n c d s r # d c d # c t s # c b u s 4 c b u s 2 c b u s 3 1 1 4 1 5 2 8 f t d i f t 2 3 2 r l y y x x - a x x x x x x x x x x x x FT232RL a g n d g n d g n d g n d t e s t 25 7 18 21 26 3v3out vccio 4 17 nc reset# nc 24 19 8 txd rxd rts# cts# dtr# dsr# dcd# ri# 1 5 3 11 2 9 10 6 cbus0 cbus3 cbus2 cbus1 23 22 13 14 20 16 15 usbdp usbdm vcc osci 27 osco 28 cbus4 12
copyright ? 2010 future technology devices international limited 8 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 pin no. name type description 17 3v3out output +3.3v output from integrated ldo regulator. this pin should be decoupled to ground using a 100nf capacitor. the main use of this pin is to provide the internal +3.3v supply to the usb trans ceiver cell and the internal 1.5k pull up resistor on usbdp. up to 50ma can be drawn from this pin to power external logic if required. this pin can also be used to supply the vccio pin. 20 vcc pwr +3.3v to +5.25v supply to the device core. (see note 1) 2 5 agnd pwr device analogue ground supply for internal clock multiplier table 3 . 2 power and ground group pin no. name type description 8, 24 nc nc no internal connection 19 reset# input active low reset pin. this c an be used by an external device to reset the ft232r. if not required can be left un connected, or pulled up to vcc . 26 test input puts the device into ic test mode. must be tied to gnd for normal operation , otherwise the device will appear to fail. 27 osci input input 12mhz oscillator cell. optional C C table 3 . 3 miscellaneous signal group pin no. name type description 1 txd output transmit asynchronous data output. 2 dtr# output data terminal ready control output / handshake signal. 3 rts# output request to send control output / handshake signal. 5 rxd input receiving asynchronous data input. 6 ri# input ring indicator control input. when remote wake up is enabled in the internal eeprom taking ri# low (20ms active low pulse) can be us ed to resume the pc usb host controller from suspend. 9 dsr# input data set ready control input / handshake signal. 10 dcd# input data carrier detect control input. 11 cts# input clear to send control input / handshake signal. 12 cbus4 i/o configurable cbus output only pin. function of this pin is configured in the device internal eeprom. factory default configuration is sleep#. see cbus signal options, table 3 . 9 . 13 cbus2 i/o configurable cbus i/o pin. function of this pin is configured in the device internal eeprom. factory default configuration is txden . see cbus signal options, table 3 . 9 .
copyright ? 2010 future technology devices international limited 9 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 pin no. name type description 14 cbus3 i/o configurable cbus i/o pin. function of this pin is configured in the device internal eeprom. factory default configuration is pw ren#. see cbus signal options, table 3 . 9 . pwren# should be used with a 10k table 3 . 4 uart interface and cusb group (see note 3) notes: 1. the minimum operating voltage vcc must be +4.0v (could use vbus=+5v) when using the internal clock generator. operation at +3.3v is possible using an external crystal oscillator. 2. f or details on how to use an external crystal, ceramic resonator, or oscillator with the ft232r , please refer s ection 7.6 3. when used in input mode, the input pins are pulled to vccio via internal 200k resistors. these pins can be programmed to gently pull low during usb suspend (pwren # = 1) by setting an option in the internal eeprom.
copyright ? 2010 future technology devices international limited 10 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 3.3 qfn - 32 package figure 3 . 2 qfn - 32 package pin out and schematic symbol 3.4 qfn - 32 package signal description pin no. name type description 1 4 usbdp i/o usb data signal plus, incorporating internal series resistor and 1.5k pull up resistor to +3.3v. 15 usbdm i/o usb data signal minus, incorporating internal series resistor. table 3 . 5 usb interface group pin no. name type description 1 vccio pwr +1.8v to +5.25v supply for the uart interface and cbus group pins (2, 3, 6,7,8,9,10 11, 21, 22, 30,31,32). in usb bus powered designs connect this pin to 3v3out to drive out at +3.3v levels, or connect to vcc to drive out at +5v cmos level. this pin c an also be supplied with an external +1.8v to +2.8v supply in order to drive out at lower levels. it should be noted that in this case this supply should originate from the same source as the supply to vcc. this means that in bus powered designs a regulato r which is supplied by the +5v on the usb bus should be used. 4, 17, 20 gnd pwr device ground supply pins. f t 2 3 2 r q 3 2 2 5 2 4 1 7 1 6 9 8 1 y y x x - a 1 8 9 1 2 3 4 5 6 7 8 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 u s b d p u s b d m 3 v 3 o u t r e s e t # v c c n c a g n d t e s t o s c i o s c o c b u s 1 c b u s 0 t x d r t s # r x d d t r # v c c i o r i # g n d n c d s r # d c d # c t s # c b u s 4 c b u s 2 c b u s 3 g n d g n d n c n c n c n c i f t d x x x x x x x ft232rq a g n d g n d g n d g n d t e s t 24 4 17 20 26 3v3out vccio 1 16 nc reset# nc 23 18 13 txd rxd rts# cts# dtr# dsr# dcd# ri# 30 2 32 8 31 6 7 3 cbus0 cbus3 cbus2 cbus1 22 21 10 11 19 15 14 usbdp usbdm vcc osci 27 osco 28 cbus4 9 nc 12 nc 5 nc 29 nc 25
copyright ? 2010 future technology devices international limited 11 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 pin no. name type description 16 3v3out output +3.3v output from integrated ldo regulator. this pin should be decoupled to ground using a 100nf capacitor. the purpose of this output is to provide the internal +3.3v supply to the usb transceiver cell and the internal 1.5k pull up resistor on usbdp. up to 50ma can be drawn from this pin to power external logic if required. this pin can also be used to supply the vccio pin. 19 v cc pwr +3.3v to +5.25v supply to the device core. ( see note 1). 24 agnd pwr device analogue ground supply for internal clock multiplier. table 3 . 6 power and ground group pin no. name type description 5, 12, 13, 23, 25, 29 nc nc no internal connection. do not connect. 18 reset# input active low reset. can be used by an external device to reset the ft232r. if not required can be left unconnected, or pulled up to vcc. 26 test input puts the device into ic test mode. must be tied to gnd for normal operation, otherwise the device will appear to fail. 27 osci input input 12mhz oscillator cell. optional C can be left unconnected for normal operation. ( see note 2). 28 osco output output from 12mhz oscillator cell. optional C can be left unconnected for normal operation if internal oscillator is used. ( see note 2). table 3 . 7 miscellaneous signal group pin no. name type description 30 txd output transmit asynchronous data output. 31 dtr# output data terminal ready control output / handshake signal. 32 rts# output request to send control output / handshake signal. 2 rxd input receiving asynchronous data input. 3 ri# input ring indicator control input. when remote wake up is enabled in the internal eeprom taking ri# low (20ms active low pulse) can be used to resume the pc usb host controller from suspend. 6 dsr# input data set ready control input / handshake signal. 7 dcd# inpu t data carrier detect control input. 8 cts# input clear to send control input / handshake signal. 9 cbus4 i/o configurable cbus output only pin. function of this pin is configured in the device internal eeprom. factory default configuration is sleep#. see cbus signal options, table 3 . 9 . 1 0 cbus2 i/o configurable cbus i/o pin. function of this pin is configured in the device internal eeprom. factory default configuration is txden . see cbus signal options, table 3 . 9 .
copyright ? 2010 future technology devices international limited 12 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 pin no. name type description 11 cbus3 i/o configurable cbus i/o pin. function of this pin is configured in the device internal eeprom. factory default configuration is pwren#. see cbus signal options, table 3 . 9 . pwren# should be used with a 10k resistor pull up. 21 cbus1 i/o configurable cbus i/o pin. function of this pin is configured in the device internal eeprom. factory default configuration is rxled#. see cbus signal options, table 3 . 9 . 22 cbus0 i/o configurable cbus i/o pin. function of this pin is c onfigured in the device internal eeprom. factory default configuration is txled#. see cbus signal options, table 3 . 9 . table 3 . 8 uart interface and cbus group (see note 3) notes: 1. the minimum operating voltage vcc must be +4.0v (could use vbus=+5v) when using the internal clock generator. operation at +3.3v is possible using an external crystal oscillator. 2. for details on how to use an external crystal, ceramic resonator, or oscillator with the ft232r , please refer to s ection 7.6 . 3. when used in input mod e, the input pins are pulled to vccio via internal 200k resistors. these pins can be programmed to gently pull low during usb suspend (pwren # = 1) by setting an option in the internal eeprom.
copyright ? 2010 future technology devices international limited 13 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 3.5 cbus signal options the following options can be configured on the cbus i/o pins. cbus signal options are common to both package versions of the ft232r. these options can be configured in the internal eep rom using the software utility ft_p prog or mprog , which can be downloaded from the ftdi utilities ( www.ftdichip.com ) . the default configuration is described in s ection 8 . cbus signal option available on cbus pin description txden cbus0, cbus1, cbus2, cbus3, cbus4 enable transmit data for rs485 pwren# cbus0, cbus1, cbus2, cbus3, cbus4 output is low after the device has been configured by usb, then high during usb suspend mode. this output can be used to control power to external logic p - channel logic level mosfet switch. enable the interface pull - down option when using the pwren# in thi s way.* txled# cbus0, cbus1, cbus2, cbus3, cbus4 transmit data led drive : data from usb host to ft232r . p ulses low when transmitting data via usb. see section 7.5 for more details. rxled# cbus0, cbus1, cbus2, cbus3, cbus4 receive data led drive : data from ft232r to usb host. p ulses low when receiving data via usb. see section 7.5 for more details. tx&rxled# cbus0, cbus1, cbus2, cbus3, cbus4 led drive C pulses low when transmitting or receiving data via usb. see section 7.5 for more details. sleep# cbus0, cbus1, cbus2, cbus3, cbus4 goes low during usb suspend mode. typically used to power down an external ttl to rs2 32 level converter ic in usb to rs232 converter designs. clk48 cbus0, cbus1, cbus2, cbus3, cbus4 48mhz 0.7% clock output. ** clk24 cbus0, cbus1, cbus2, cbus3, cbus4 24 mhz clock output.** clk12 cbus0, cbus1, cbus2, cbus3, cbus4 12 mhz clock output.** clk6 cbus0, cbus1, cbus2, cbus3, cbus4 6 mhz 0.7% clock output. ** cbitbangi/o cbus0, cbus1, cbus2, cbus3 cbus bit bang mode option. allows up to 4 of the cbus pins to be used as general purpose i/o. configured individually for cbus0, cbus1, cbus2 and cbus3 in the internal eeprom. a separate application note, an232r - 01 , available from ftdi website ( www.ftdichip.com ) describes in more detail how to use cbus bit bang mode. bitbangwrn cbus0, cbus1, cbus2, cbus3 synchronous and asynchronous bit bang mode wr# strobe output. bitbangrdn cbus0, cbus1, cbus2, cbus3 synchronous and asynchronous bit bang mode rd# strobe output. table 3 . 9 cbus configuration control * pwren# must be used with a 10k resistor pull up. **when in usb suspend mode the outputs clocks are also suspended.
copyright ? 2010 future technology devices international limited 14 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 4 function description the ft232r is a usb to serial uart interface device which simplifies usb to serial designs and reduces external component count by fully integrating an external eeprom, usb termination resistors and an integrated clock circuit which requires no external cr ystal, into the device. it has been designed to operate efficiently with a usb host controller by using as little as possible of the total usb bandwidth available. 4.1 key features functional integration. fully integrated eeprom, usb termination resistors , c lock generation, avcc filtering, por and ldo regulator. configurable cbus i/o pin options. the fully integrated eeprom allows configuration of the control bus (cbus) functionality, signal inversion and drive strength selection. there are 5 configurable cb us i/o pins. these configurable options are 1. txden - transmit enable for rs485 designs. 2. pwren# - power control for high power, bus powered designs. 3. txled# - for pulsing an led upon transmission of data. 4. rxled# - for pulsing an led upon receiving data. 5. tx&rxled# - which will pulse an led upon transmission or reception of data . 6. sleep# - indicates that the device going into usb suspend mode. 7. clk48 / clk24 / clk12 / clk6 - 48mhz, 24mhz, 12mhz, and 6mhz clock output signal options. the cbus pins can also be individually configured as gpio pins, similar to asynchronous bit bang mode. it is possible to use this mode while the uart interface is being used, thus providing up to 4 general purpose i/o pins which are available during normal operation. an application note, an232r - 01 , available from ftdi website ( www.ftdichip.com ) describes this feature. the cbus lines can be configured with any one of these output options by setting bits in the internal eeprom. the device is supplied with the most commonly used pin definitions pre - programmed - see section 8 for details. asynchronous bit bang mode with rd# and wr# strobes. the ft232r supports ftdi?s previous chip generation bit - bang mode. in bit - bang mode, the eight uart lines can be switched from the regular interface mode to an 8 - bit general purpose i/o port. data packets can be sent to the device and they will be sequentially sent to the interface at a rate controlled by an internal timer (equivalent to the baud rate pre - scaler). with the f t232r device this mode has been enhanced by outputting the internal rd# and wr# strobes signals which can be used to allow external logic to be clocked by accesses to the bit - bang i/o bus. this option will be described more fully in a separate application note available from ftdi website ( www.ftdichip.com ) . synchronous bit bang mode. the ft232r supports synchronous bit bang mode. this mode differs from asynchronous bit bang mode in that the interface pins are only read when the device is written to. this makes it easier for the controlling program to measure the response to an output stimulus as the data returned is synchronous to the output data. an application note, an232r - 01 , available from ftdi website ( www.ftdichip.com ) describes this feature. ftdichip - id?. the ft232r also includes the new ftdichip - id? security dongle feature. this ftdichip - id? feature allows a unique number to be burnt into each device during manufacture. this number cannot be reprogrammed. this number is only readable over usb and forms a b asis of a security dongle which can be used to protect any customer application software being copied. this allows the possibility of using the ft232r in a dongle for software licensing. further to this, a renewable license scheme can be implemented based on the ftdichip - id? number when encrypted with other information. this encrypted number can be stored in the user area of the ft232r internal eeprom, and can be decrypted, then compared with the protected ftdichip - id? to verify that a license is valid. web based applications can be used to maintain product licensing this way. an application note, an232r - 02 , available from ftdi website ( www.ftdichip.com ) describes this feature. the ft232r is capable of operating at a voltage supply between +3.3v and +5v with a nominal operational mode current of 15ma and a nominal usb suspend mode current of 70a. this al lows greater margin for peripheral designs to meet the usb suspend mode current limit of 2.5ma . an integrated level converter within the uart interface allows the ft232r to interface to uart logic running at +1.8v, 2.5v, +3.3v or +5v.
copyright ? 2010 future technology devices international limited 15 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 4.2 functional block desc riptions the following paragraphs detail each function within the ft232r. please refer to the block diagram shown in figure 2.1 internal eeprom. the internal eeprom in the ft232r is used to store usb vendor id (vid), product id (pid), device serial number, product description string and various other usb configuration descriptors. the internal eeprom is also used to configure the cbus pin functions. the ft232r is supplied with the internal eeprom pre - programmed as described in section 8 . a user area of the internal eeprom is available to system designers to allow storing additional data. the internal eeprom descriptors can be programmed in circuit, over usb without any additional voltage requirement. it can be programmed using the ftdi utility software called mprog, which can be downloaded from ftdi utilities on the ftdi website ( www.ftdichip.com ) . +3.3v ldo regulator. the +3.3v ldo regulator generates the +3.3v reference voltage for driving the usb transceiver cell output buffers. it requires an external decoupling capacitor to be att ached to the 3v3out regulator output pin. it also provides +3.3v power to the 1.5k internal pull up resistor on usbdp. the main function of the ldo is to power the usb transceiver and the reset generator cells rather than to power external logic. however, it can be used to supply external circuitry requiring a +3.3v nominal supply with a maximum current of 50ma. usb transceiver. the usb transceiver cell provides the usb 1.1 / usb 2.0 full - speed physical interface to the usb cable. the output drivers provid e +3.3v level slew rate control signalling, whilst a differential input receiver and two single ended input receivers provide usb data in, single - ended - 0 (se0) and usb reset detection conditions respectfully. this function also incorporates the internal us b series termination resistors on the usb data lines and a 1.5k pull up resistor on usbdp. usb dpll. the usb dpll cell locks on to the incoming nrzi usb data and generates recovered clock and data signals for the serial interface engine (sie) block. inter nal 12mhz oscillator - the internal 12mhz oscillator cell generates a 12mhz reference clock. this provides an input to the x4 clock multiplier function. the 12mhz oscillator is also used as the reference clock for the sie, usb protocol engine and uart fifo controller blocks. clock multiplier / divider. the clock multiplier / divider takes the 12mhz input from the internal oscillator function and generates the 48mhz, 24mhz, 12mhz and 6mhz reference clock signals. the 48mz clock reference is used by the usb d pll and the baud rate generator blocks. serial interface engine (sie). the serial interface engine (sie) block performs the parallel to serial and serial to parallel conversion of the usb data. in accordance with the usb 2.0 specification, it performs bit stuffing/un - stuffing and crc5/crc16 generation. it also checks the crc on the usb data stream. usb protocol engine. the usb protocol engine manages the data stream from the device usb control endpoint. it handles the low level usb protocol requests generat ed by the usb host controller and the commands for controlling the functional parameters of the uart in accordance with the usb 2.0 specification chapter 9. fifo r x buffer (128 bytes). data sent from the usb host controller to the uart via the usb data out endpoint is stored in the fifo rx (receive) buffer. data is removed from the buffer to the uart transmit register under control of the uart fifo controller. (rx relative to the usb interface). fifo t x buffer (256 bytes). data from the uart receive registe r is stored in the t x buffer . the usb host controller removes data from the fifo tx buffer by sending a usb request for data from the device data in endpoint. (tx relative to the usb interface). uart fifo controller. the uart fifo controller handles the transfer of data between the fifo rx and tx buffers and the uart transmit and receive registers. uart controller with programmable signal inversion and high drive. together with the uart fifo controller the uart controller handles the transfer of data betw een the fifo rx and fifo tx buffers and the uart transmit and receive registers. it performs asynchronous 7 or 8 bit parallel to serial and serial to parallel conversion of the data on the rs232 (or rs422 or rs485) interface. control signals supported by uart mode include rts, cts, dsr, dtr, dcd and ri. the uart controller also provides a transmitter enable control signal pin option ( txden ) to assist with interfacing to rs485 transceivers. rts/cts, dsr/dtr and x on / x off handshaking options are also suppor ted. handshaking is handled in hardware to ensure fast response times. the uart interface also supports the rs232 break setting and detection conditions.
copyright ? 2010 future technology devices international limited 16 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 additionally, the uart signals can each be individually inverted and have a configurable high drive s trength capability. both these features are configurable in the eeprom. baud rate generator - the baud rate generator provides a 16x clock input to the uart controller from the 48mhz reference clock. it consists of a 14 bit pre - scaler and 3 register bits which provide fine tuning of the baud rate (used to divide by a number plus a fraction or sub - integer). this determines the baud rate of the uart, which is programmable from 183 baud to 3 mbaud. the ft232r supports all standard baud rates and non - standar d baud rates from 183 baud up to 3 mbaud. achievable non - standard baud rates are calculated as follows - baud rate = 3000000 / (n + x ) where ?n? can be any integer between 2 and 16,384 ( = 2 14 ) and ? x can be a sub - integer of the value 0, 0.125, 0.25, 0.375, 0.5, 0.625, 0.75, or 0.875. when n = 1, x = 0, i.e. baud rate divisors with values between 1 and 2 are not possible. this gives achievable baud rates in the range 183.1 baud to 3,000,000 baud. when a non - standard baud rate is required simply pass the required baud rate value to the driver as normal, and the ftdi driver will calculate the required divisor, and set the baud rate. see ftdi application note an232b - 05 on the ftdi website ( www.ftdichip.com ) for more details. reset generator - the integrated reset generator cell provides a reliable power - on r eset to the device internal circuitry at power up. the reset# input pin allows an external device to reset the ft232r. reset# can be tied to vcc or left unconnected if not being used.
copyright ? 2010 future technology devices international limited 17 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 5 devices characteristics and ratings 5.1 absolute maximum ratings the absolute maximum ratings for the ft232r devices are as follows. these are in accordance with the absolute maximum rating system (iec 60134). exceeding these may cause permanent damage to the device. parameter value unit storage temperature - 65c to 150c degrees c floor life (out of bag) at factory ambient (30c / 60% relative humidity) 168 hours (ipc/jedec j - std - 033a msl level 3 compliant)* hours ambient temperature (power applied) - 40c to 85c degrees c mttf FT232RL 11162037 hours mttf ft232rq 4464815 hours vcc supply voltage - 0.5 to +6.00 v dc input voltage C C C C C table 5 . 1 absolute maximum ratings * if devices are stored out of the packaging beyond this time limit the devices should be baked before use. the devices should be ramped up to a temperature of + 125 c and baked for up to 17 hours .
copyright ? 2010 future technology devices international limited 18 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 5.2 dc characteristics dc characteristics (ambient temperature = - 40c to + 85c ) parameter description minimum typical maximum units conditions vcc 1 vcc operating supply voltage 4.0 --- 5.25 v using internal oscillator vcc 1 vcc operating supply voltage 3. 3 --- 5.25 v using external crystal vcc 2 vccio operating supply voltage 1.8 --- 5.25 v icc1 operating supply current --- 15 --- ma normal operation icc2 operating supply current 50 70 100 a table 5 . 2 operating voltage and current parameter description minimum typical maximum units conditions voh output voltage high 3.2 4.1 4.9 v i source = 2ma vol output voltage low 0.3 0.4 0.6 v i sink = 2ma vin input switching threshold 1.0 1.2 1.5 v ** vhys input switching hysteresis 20 25 30 mv ** table 5 . 3 uart and cbus i/o pin characteristics (vccio = + 5.0v, standard drive level) parameter description minimum typical maximum units conditions voh output voltage high 2.2 2.7 3.2 v i source = 1ma vol output voltage low 0.3 0.4 0.5 v i sink = 2ma vin input switching threshold 1.0 1.2 1.5 v ** vhys input switching hysteresis 20 25 30 mv ** table 5 . 4 uart and cbus i/o pin characteristics (vccio = + 3.3v, standard drive level)
copyright ? 2010 future technology devices international limited 19 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 parameter description minimum typical maximum units conditions voh output voltage high 2.1 2.6 2.8 v i source = 1ma vol output voltage low 0.3 0.4 0.5 v i sink = 2ma vin input switching threshold 1.0 1.2 1.5 v ** vhys input switching hysteresis 20 25 30 mv ** table 5 . 5 uart and cbus i/o pin characteristics (vccio = + 2.8v, standard drive level) parameter description minimum typical maximum units conditions voh output voltage high 1.32 1.62 1.8 v i source = 0.2 ma vol output voltage low 0. 06 0. 1 0. 18 v i sink = 0.5 ma vin input switching threshold 1.0 1.2 1.5 v ** vhys input switching hysteresis 20 25 30 mv ** table 5 . 6 uart and cbus i/o pin characteristics (vccio = + 1.8v, standard drive level) parameter description minimum typical maximum units conditions voh output voltage high 3.2 4.1 4.9 v i source = 6ma vol output voltage low 0.3 0.4 0.6 v i sink = 6ma vin input switching threshold 1.0 1.2 1.5 v ** vhys input switching hysteresis 20 25 30 mv ** table 5 . 7 uart and cbus i/o pin characteristics (vccio = + 5.0v, high drive level) parameter description minimum typical maximum units conditions voh output voltage high 2.2 2.8 3.2 v i source = 3ma vol output voltage low 0.3 0.4 0.6 v i sink = 8ma vin input switching threshold 1.0 1.2 1.5 v ** vhys input switching hysteresis 20 25 30 mv ** table 5 . 8 uart and cbus i/o pin characteristics (vccio = + 3.3v, high drive level)
copyright ? 2010 future technology devices international limited 20 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 parameter description minimum typical maximum units conditions voh output voltage high 2.1 2. 6 2.8 v i source = 3ma vol output voltage low 0.3 0.4 0.6 v i sink = 8ma vin input switching threshold 1.0 1.2 1.5 v ** vhys input switching hysteresis 20 25 30 mv ** table 5 . 9 uart and cbus i/o pin characteristics (vccio = + 2.8v, high drive level) parameter description minimum typical maximum units conditions voh output voltage high 1.35 1.67 1.8 v i source = 0.4 ma vol output voltage low 0. 12 0. 18 0. 35 v i sink = 3 ma vin input switching threshold 1.0 1.2 1.5 v ** vhys input switching hysteresis 20 25 30 mv ** table 5 . 10 uart and cbus i/o pin characteristics (vccio = + 1.8v, high drive level) ** only input pins have an internal 200k pull - up resistor to vccio parameter description minimum typical maximum units conditions vin input switching threshold 1.3 1.6 1.9 v vhys input switching hysteresis 50 55 60 mv table 5 . 11 reset# and test pin characteristics
copyright ? 2010 future technology devices international limited 21 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 parameter description minimum typical maximum units conditions uvoh i/o pins static output (high) 2.8 3.6 v ri = 1.5k to 15k to gnd (d ri = 1.5k to 15k to gnd (d table 5 . 12 usb i/o pin (usbdp, usbdm) characteristics 5.3 eeprom reliability characteristics the internal 1024 bit eeprom has the following reliability characteristics: parameter value unit data retention 1 0 years read / write cycle 10,000 cycles table 5 . 13 eeprom characteristics 5.4 internal clock characteristics the internal clock oscillator has the following characteristics: parameter value unit minimum typical maximum frequency of operation (see note 1) 11.98 12.00 12.02 mhz clock period 83.19 83.33 83.47 ns duty cycle 45 50 55 % table 5 . 14 internal clock characteristics note 1: equivalent to +/ - 1667ppm
copyright ? 2010 future technology devices international limited 22 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 parameter description minimum typical maximum units conditions voh output voltage high 2.1 2.8 3.2 v i source = 3ma vol output voltage low 0.3 0.4 0.6 v i sink = 8ma vin input switching threshold 1.0 1.2 1.5 v table 5 . 15 osci, osco pin characteristics C see note 1 note1: when supplied, the ft232r is configured to use its internal clock oscillator. these characteristics only apply when an external oscillator or crystal is used.
copyright ? 2010 future technology devices international limited 23 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 6 usb power configurations the following sections illustrate possible usb power configurations fo r the ft232r. the illustrations have omitted pin numbers for ease of understanding since the pins differ between the FT232RL and ft232rq package options. all usb power configurations illustrated apply to both package options for the ft232r device. please r efer to section 3 for the package option pin - out and signal descriptions. 6.1 usb bus powered configuration figure 6 . 1 bus powered configuration figure 6 . 1 illustrates the ft232r in a typical usb bus powered design configuration. a usb bus powered device gets its power from the us b bus. basic rules for usb bus power devices are as follows C i) on plug - in to usb, the device should draw no more current than 100ma. ii) in usb suspend mode the device should draw no more than 2.5ma . iii) a bus powered high power usb device (one that draws more than 100ma) should use one of the cbus pins configured as pwren# and use it to keep the current below 100ma on plug - in and 2.5ma on usb suspend. iv) a device that consumes more than 100ma cannot be plugg ed into a usb bus powered hub. v) no device can draw more than 500ma from the usb bus. the power descriptors in the internal eeprom of the ft232r should be programmed to match the current drawn by the device. a ferrite bead is connected in series with the usb power supply to reduce emi noise from the ft232r and associated circuitry being radiated down the usb cable to the usb host. the value of the ferrite bead depends on the total current drawn by the application. a suitable range of ferrite beads is availabl e from steward ( www.steward.com ) , for example steward part # mi0805k400r - 10. note: if using pwren# (available using the cbus) th e pin should be pulled to vccio using a 10k resistor. ft232r a g n d g n d g n d g n d t e s t 100nf 3v3out vccio nc reset# nc + 100nf 10nf vcc txd rxd rts# cts# dtr# dsr# dcd# ri# cbus0 cbus3 cbus2 cbus1 usbdp usbdm vcc 1 2 3 4 5 osci osco cbus4 ferrite bead + 4.7uf shield gnd gnd gnd gnd vcc
copyright ? 2010 future technology devices international limited 24 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 6.2 self powered configuration figure 6 . 2 self powered configuration figure 6 . 2 illustrates the ft232r in a typical usb self powered configuration. a usb self powered device gets its power from its own power supply, vcc, and does not draw current from the usb bus. the ba sic rules for usb self powered devices are as follows C i) a self powered device should not force current down the usb bus when the usb host or hub controller is powered down. ii) a self powered device can use as much current as it needs during normal operation a nd usb suspend as it has its own power supply. iii) a self powered device can be used with any usb host, a bus powered usb hub or a self powered usb hub. the power descriptor in the internal eeprom of the ft232r should be programmed to a value of zero (self pow ered). in order to comply with the first requirement above, the usb bus power (pin 1) is used to control the reset# pin of the ft232r device. when the usb host or hub is powered up an internal 1.5k resistor on usbdp is pulled up to +3.3v (generated using the 4k7 and 10k resistor network), thus identifying the device as a full speed device to the usb host or hub. when the usb host or hub is powered off, reset# will be low and the ft232r is held in reset. since reset# is low, the internal 1.5k resistor is n ot pulled up to any power supply (hub or host is powered down), so no current flows down usbdp via the 1.5k pull - up resistor. failure to do this may cause some usb host or hub controllers to power up erratically. figure 6 . 2 illustrates a self powered design which has a + 4 v to +5 .25 v supply. note: 1. when the ft232r is in reset, the uart interface i/o pins are tri - stated. input pins have internal 200k pull - up resistors to vccio, so they will gently pull high unless driven by some external logic. 2. when using internal ft232r oscillator the vcc supply voltage range must be +4.0v to 5.25v. 3. when using external oscillator the vcc supply voltage range must be +3.3v to 5.25v any design which interfaces to +3.3 v or +1.8v would be having a +3.3v or +1.8v supply to vccio.
copyright ? 2010 future technology devices international limited 25 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 6.3 usb bus powered with power switching configuration figure 6 . 3 bu s powered with power switching configuration a requirement of usb bus powered applications, is when in usb suspend mode, the application draws a total current of less than 2.5ma . this requirement includes external logic. some external logic has the ability to power itself down into a low current state by monitoring the pwren# signal. for external logic that cannot power itself down in this way, the ft232r provides a simple but effective method of turning off power during the usb suspend mode. figure 6 . 3 shows an example of using a discrete p - channel mosfet to control the power to external logic. a suitable device to do this is an international rectifier (www.irf.com) ir lml6402, or equivalent. it is recommended that a soft start circuit consisting of a 1k series resistor and a 0.1f capacitor is used to limit the current surge when the mosfet turns on. without the soft start circuit it is possible that the transient po wer surge, caused when the mosfet switches on, will reset the ft232r or the usb host/hub controller. the soft start circuit example shown in figure 6 . 3 powers up with a slew rate of approximaely12.5v/ms. thus supply voltage to external logic transitions from gnd to +5v in approximately 400 microseconds. as an alternative to the mosfet, a dedicated power switch ic with inbuilt soft - start can be used. a suitable power s witch ic for such an application is the micrel ( www.micrel.com ) mic2025 - 2bm or equivalent. with power switching controlled designs the following should be noted: i) the external logic to which the power is being switched should have its own reset circuitry to automatically reset the logic when power is re - applied when moving out of suspend mode. ii) set the pull - down on suspend opti on in the internal ft232r eeprom. iii) one of the cbus pins should be configured as pwren# in the internal ft232r eeprom, and used to switch the power supply to the external circuitry. this should be pulled high through a 10 k? resistor. iv) for usb high - power bus powered applications (one that consumes greater than 100ma, and up to 500ma of current from the usb bus), the power consumption of the application must be set in the max power field in the internal ft232r eeprom. a high - power bus powered application uses t he descriptor in the internal ft232r eeprom to inform the system of its power requirements. v) pwren# gets its vcc from vccio. for designs using 3v3 logic, ensure vccio is not powered down using the external logic. in this case use the +3v3out. f t 2 3 2 r g n d g n d 1 0 0 n f v c c u s b d m u s b d p v c c i o n c r e s e t # n c o s c i o s c o 3 v 3 o u t a g n d g n d g n d g n d t e s t t x d r x d r t s # c t s # d t r # d s r # d c d # r i # c b u s 0 c b u s 1 c b u s 2 c b u s 3 c b u s 4 1 2 3 4 g n d s h i e l d g n d 1 0 0 n f 4 . 7 u f + 5 1 0 n f + f e r r i t e b e a d s d g p - c h a n n e l p o w e r m o s f e t p w r e n # 1 k s w i t c h e d 5 v p o w e r t o e x t e r n a l l o g i c s o f t s t a r t c i r c u i t 0 . 1 u f 0 . 1 u f 5 v v c c 5 v v c c 5 v v c c 1 0 k
copyright ? 2010 future technology devices international limited 26 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 6.4 usb bus power ed with selectable external logic supply figure 6 . 4 usb bus powered with +3.3v or + 5v external logic power supply figure 6 . 4 illustrates a usb bus power application with selectable external logic supply. the external logic can be selected between +3.3v and +5v using the jumper switch. this jumper is used to allow the ft232r to be interfaced wit h a +3.3v or +5v logic devices. the vccio pin is either supplied with +5v from the usb bus (jumper pins1 and 2 connected), or from the +3.3v output from the ft232r 3v3out pin (jumper pins 2 and 3 connected). the supply to vccio is also used to supply exter nal logic. with bus powered applications, the following should be noted: i) to comply with the 2.5ma current supply limit during usb suspend mode, pwren# or sleep# signals should be used to power down external logic in this mode. if this is not possible, use the configuration shown in section 6.3 . ii) the maximum current sourced from the usb bus during normal operation should not exceed 100ma, otherwise a bus powered design with power switching (section 6.3 ) should be used. another possible configuration could use a discrete low dropout (ldo) regulator which is supplied by the 5v on the usb bus to supply between +1.8v and +2.8v to the vccio pin and to the external logic. in this case vcc would be supplied with the +5v from the usb bus and the vccio would be supplied from the output of the ldo regulator. this results in the ft232r i/o pins driving out at between +1.8v and +2.8v logic levels. for a usb bus powered application, it is important to consider the following when selecting the regulator: i) the regulator must be capable of sustaining its output voltage with an input voltage of +4.35v. an low drop out (ldo) regulator should be selected. ii) the qu iescent current of the regulator must be low enough to meet the total current requirement of <= 2.5ma during usb suspend mode. a suitable series of ldo regulators that meets these requirements is the microchip/telcom (www.microchip.com) tc55 series of devi ces. these devices can supply up to 250ma current and have a quiescent current of under 1a. f t 2 3 2 r a g n d g n d g n d g n d t e s t 1 0 0 n f 3 v 3 o u t v c c i o n c r e s e t # n c 1 0 n f t x d r x d r t s # c t s # d t r # d s r # d c d # r i # c b u s 0 c b u s 3 c b u s 2 c b u s 1 u s b d p u s b d m v c c 1 2 3 4 5 o s c i o s c o c b u s 4 f e r r i t e b e a d + s h i e l d g n d g n d g n d 3 . 3 v o r 5 v s u p p l y t o e x t e r n a l l o g i c 1 0 0 n f + 1 0 0 n f v c c 4 . 7 u f g n d 1 j u m p e r s l e e p # p w r e n # 2 3 v c c v c c i o 1 0 k v c c i o
copyright ? 2010 future technology devices international limited 27 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 7 application examples the following sections illustrate possible applications of the ft232r. the illustrations have omitted pin numbers for ease of understanding si nce the pins differ between the FT232RL and ft232rq package options. 7.1 usb to rs232 converter figure 7 . 1 application example showing usb to rs232 converter an example of using the ft232r as a usb to rs232 converter is illustrated in figure 7.1. in this application, a ttl to rs232 level converter ic is used on the serial uart interface of the ft232r to convert the ttl levels of the ft232r to rs232 levels. this level shift can be done using the popular 213 series of ttl to rs232 level converters. these 213 devices typically have 4 transmitters and 5 receivers in a 28 - ld ssop package and feature an in - built voltage converter to convert the +5v (nominal) vcc to the + / - 9 volts requir ed by rs232. a useful feature of these devices is the shdn# pin which can be used to power down the device to a low quiescent current during usb suspend mode. a suitable level shifting device is the sipex sp213ehca which is capable of rs232 communication a t up to 500k baud. if a lower baud rate is acceptable, then several pin compatible alternatives are available such as the sipex sp213eca, the maxim max213cai and the analogue devices adm213e, which are all suitable for communication at up to 115.2k baud. i f a higher baud rate is required, the maxim max3245cai device is capable of rs232 communication rates up to 1mbaud. note that the max3245 is not pin compatible with the 213 series devices and that the shdn pin on the max device is active high and should be connect to pwren# pin instead of sleep# pin. in example shown, the cbus0 and cbus1 have been configured as txled# and rxled# and are being used to drive two leds. f t 2 3 2 r g n d g n d 1 0 0 n f v c c u s b d m u s b d p v c c i o n c r e s e t # n c o s c i o s c o 3 v 3 o u t a g n d g n d g n d g n d t e s t t x d r x d r t s # c t s # d t r # d s r # d c d # r i # c b u s 0 c b u s 1 c b u s 2 c b u s 3 c b u s 4 1 2 3 4 g n d s h i e l d g n d 1 0 0 n f 4 . 7 u f + 5 1 0 n f + f e r r i t e b e a d v c c v c c s l e e p # g p i o 2 g p i o 3 t x d r x d r t s # c t s # d t r # d s r # d c d # r i # r s 2 3 2 l e v e l c o n v e r t e r t x d a t a r x d a t a r t s c t s d t r d s r d c d r i t x l e d # r x l e d # v c c v c c 2 7 0 r 2 7 0 r g n d r i d t r c t s t x d a t a r t s r x d a t a d s r d c d d b 9 m s h i e l d 1 0 5 9 4 8 3 7 2 6 1 s h d n #
copyright ? 2010 future technology devices international limited 28 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 7.2 usb to rs485 coverter figure 7 . 2 application example showing usb to rs485 converter an example of using the ft232r as a usb to rs485 converter is shown in figure 7.2. in this application, a ttl to rs485 level converter ic is used on the serial uart interfac e of the ft232r to convert the ttl levels of the ft232r to rs485 levels. this example uses the sipex sp481 device. equivalent devices are available from maxim and analogue devices. the sp481 is a rs485 device in a compact 8 pin sop package. it has separate enables on both the transmitter and receiver. with rs485, the transmitter is only enabled when a character is being transmitted from the uart. the txden signal cbus pin option on the ft232r is provided for exactly this purpose and so the transmitter enabl e is wired to cbus2 which has been configured as txden . similarly, cbus3 has been configured as pwren#. this signal is used to control the sp481?s receiver enable. the receiver enable is active low, so it is wired to the pwren# pin to disable the receiver when in usb suspend mode. cbus2 = txden and cbus3 = pwren# are the default device configurations of the ft232r pins. rs485 is a multi - drop network; so many devices can communicate with each other over a two wire cable interface. the rs485 cable requires t o be terminated at each end of the cable. a link (which provides the 120? termination) allows the cable to be terminated if the sp481 is physically positioned at either end of the cable. in this example the data transmitted by the ft232r is also present on the receive path of the sp481.this is a common feature of rs485 and requires the application software to remove the transmitted data from the received data stream. with the ft232r it is possible to do this entirely in hardware by modifying the example sho wn in figure 7 . 2 by logically or?ing the ft232r txden and the sp481 receiver output and connecting the output of the or gate to the rxd of the ft232r. note that the t xden is activated 1 bit period before the start bit. txden is deactivated at the same time as the stop bit. this is not configurable. f t 2 3 2 r g n d g n d 1 0 0 n f v c c u s b d m u s b d p v c c i o n c r e s e t # n c o s c i o s c o 3 v 3 o u t a g n d g n d g n d g n d t e s t t x d r x d r t s # c t s # d t r # d s r # d c d # r i # c b u s 0 c b u s 1 c b u s 2 c b u s 3 c b u s 4 1 2 3 4 g n d s h i e l d g n d 1 0 0 n f 4 . 7 u f + 5 1 0 n f + f e r r i t e b e a d v c c v c c t x d r x d g n d d b 9 m s h i e l d 1 0 t x d e n g p o p w r e n # g p i o 0 g p i o 1 v c c i o 1 0 k r s 4 8 5 l e v e l c o n v e r t e r v c c s p 4 8 1 5 1 2 3 4 l i n k 1 2 0 r 7 6
copyright ? 2010 future technology devices international limited 29 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 7.3 usb to rs422 converter figure 7 . 3 usb to rs422 converter configuration an example of using the ft232r as a usb to rs422 converter is shown in figure 7.3. in this application, two ttl to rs422 level converter ics are used on the serial uart interface of the ft232r to convert the ttl levels of the ft232r to rs422 levels. there are many suitable level converter devices available. this example uses sipex sp491 devices which have enables on both the transmitter and receiver. since the sp491 transmitter enable is active high, it is connected to a cbus pin in sleep# configuration. the sp491 receiver enable is active low and is therefore connected to a cbus pin pwren# configuration. this ensures that when both the sp491 transmitters and receivers are enabled then the device is active, and when the d evice is in usb suspend mode, the sp491 transmitters and receivers are disabled. if a similar application is used, but the design is usb bus powered, it may be necessary to use a p - channel logic level mosfet (controlled by pwren#) in the vcc line of the sp 491 devices to ensure that the usb standby current of 2.5ma is met. the sp491 is specified to transmit and receive data at a rate of up to 5 mbaud. in this example the maximum data rate is limited to 3 mbaud by the ft232r. f t 2 3 2 r g n d g n d 1 0 0 n f v c c u s b d m u s b d p v c c i o n c r e s e t # n c o s c i o s c o 3 v 3 o u t a g n d g n d g n d g n d t e s t t x d r x d r t s # c t s # d t r # d s r # d c d # r i # c b u s 0 c b u s 1 c b u s 2 c b u s 3 c b u s 4 - 1 2 3 4 g n d s h i e l d g n d 1 0 0 n f 4 . 7 u f + 5 1 0 n f + f e r r i t e b e a d v c c v c c p w r e n # r s 4 2 2 l e v e l c o n v e r t e r v c c s p 4 9 1 5 3 4 7 6 t x d m t x d p r x d p r x d m 1 2 0 r 1 0 9 1 1 1 2 s l e e p # r s 4 2 2 l e v e l c o n v e r t e r s p 4 9 1 3 4 7 6 v c c v c c 1 0 k 2 5 1 2 0 r 1 1 1 2 9 1 0 r t s m r t s p c t s p c t s m g n d d b 9 m s h i e l d t x d m t x d p r x d p r x d m r t s m r t s p c t s p c t s m 2
copyright ? 2010 future technology devices international limited 30 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 7.4 usb to mcu uar t interface figure 7 . 4 usb to mcu uart interface an example of using the ft232r as a usb to microcontroller (mcu) uart interface is shown in figure 7.4. in this application the ft232r uses txd and rxd for transmission and reception of data, and rts# / cts# signals for hardware handshaking. also in this example cbus0 has been configured as a 12mhz output to clock the mcu. optionally, ri# could be connected to another i/o pin on th e mcu and used to wake up the usb host controller from suspend mode. if the mcu is handling power management functions, then a cbus pin can be configured as pwren# and would also be connected to an i/o pin of the mcu. f t 2 3 2 r g n d g n d 1 0 0 n f v c c u s b d m u s b d p v c c i o n c r e s e t # n c o s c i o s c o 3 v 3 o u t a g n d g n d g n d g n d t e s t t x d r x d r t s # c t s # d t r # d s r # d c d # r i # c b u s 0 c b u s 1 c b u s 2 c b u s 3 c b u s 4 1 2 3 4 g n d s h i e l d g n d 1 0 0 n f 4 . 7 u f + 5 1 0 n f + f e r r i t e b e a d v c c v c c p w r e n # v c c 1 2 m h z o u t 1 0 k m i c r o c o n t r o l l e r c l k _ i n i / o r t s # r x d t x d c t s # v c c
copyright ? 2010 future technology devices international limited 31 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 7.5 led interface any of the cbus i/o pins can be configured to drive an led. the ft232r has 3 configuration options for driving leds from the cbus. these are txled#, rxled#, and tx&rxled#. refer to section 3.5 for configuration options. figure 7 . 5 dual led configuration an example of using the ft232r to drive leds is shown in figure 7 . 5 . in this application one of the cbus pins is used to indicate transmission of data (txled#) and another is used to indicate receiving data (rxled#). when data is being transmitted or rece ived the respective pins will drive from tri - state to low in order to provide indication on the leds of data transfer. a digital one - shot is used so that even a small percentage of data transfer is visible to the end user. figu re 7 . 6 single led configuration another example of using the ft232r to drive leds is shown in figu re 7 . 6 . in this example one of the cbus pins is used to indicate when data is being transmitted or received by the device (tx&rxled). in this configuration the ft232r will drive only a single led. f t 2 3 2 r c b u s [ 0 . . . 4 ] c b u s [ 0 . . . 4 ] v c c i o t x t x l e d # r x l e d # r x 2 7 0 r 2 7 0 r f t 2 3 2 r c b u s [ 0 . . . 4 ] t x & r x l e d # 2 7 0 r v c c i o l e d
copyright ? 2010 future technology devices international limited 32 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 7.6 using the external osc illator the ft232r defaults to operating using its own internal oscillator. this requires that the device is powered with vcc(min)=+4 .0 v. this supply voltage can be taken from the usb vbus . applications which require using an externa l oscillator, vcc= +3.3v, must do so in the following order: 1. when device powered for the very first time, it must have vcc > +4 .0 v. this supply is available from the usb vbus supply = +5 .0 v. 2. the eeprom must then be programmed to enable external oscillator. this eeprom modification cannot be done using the ftdi programming utility, mprog. the eeprom can only be re - configured from a custom application. please refer to the following applications note on how to do this: http://www.ftdichip.com/documents/appnotes/an_100_using_the_ft232_245r_with_external_ osc(ft_000067).pdf 3. the ft232r can then be powered from vcc=+3.3v and an external oscillator . this can be done using a link to switch the vcc supply. the ft232r will fail to operate when the in ternal oscillator has been disabled , but no external oscillator has been connected.
copyright ? 2010 future technology devices international limited 33 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 8 internal eeprom configuration following a power - on reset or a usb rese t the ft232r will scan its internal eeprom and read the usb configuration descriptors stored there. the default factory programmed values of the internal eeprom are shown in table 8 . 1 . parameter value notes usb vendor id (vid) 0403h ftdi default vid (hex) usb product ud (pid) 6001h ftdi default pid (hex) serial number enabled? yes serial number see note a unique serial number is generated and programmed into the eeprom during device final test. pull down i/o pins in usb suspend disabled enabling this option will make the device pull down on the uart interface lines when in usb suspend mode ( pwren# is hig h). manufacturer name ftdi product description ft 232r usb uart max bus power current 9 0ma power source bus powered device type ft232r usb version 0200 returns usb 2.0 device descript ion t o the host. note: the de vice is a usb 2.0 full speed device (12mb/s) as opposed to a usb 2.0 high speed device (480mb/s). remote wake up enabled taking ri# low will wake up the usb host controller from suspend in approximately 20 ms . high current i/os disabled enables the high drive level on the uart and cbus i/o pins. load vcp driver enabled makes the device load the vc p driver interface for the device. cbus0 txled# default configuration of cbus0 C C C C
copyright ? 2010 future technology devices international limited 34 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 parameter value notes cbus4 sleep# default configuration of cbus4 C table 8 . 1 default internal eeprom configuration the internal eeprom in the ft232r can be programmed over usb using the ftdi util ity program mprog. mprog can be downloaded from ftdi utilities on the ftdi website ( www.ftdichip.com ) . version 2.8a or later is required for the ft232r chip. users who do not have their own usb vendor id but who would like to use a unique product id in their design can apply to ftdi for a free block of unique pids. contact ftdi support for this service.
copyright ? 2010 future technology devices international limited 35 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 9 package parameters the ft232r is available in two different packages. the FT232RL is the ssop - 28 option and the ft232rq is the qfn - 32 package option. the solder reflow profile for both packages is described in section 9.5 . 9.1 ssop - 28 package dimensions figure 9 . 1 ssop - 28 package dimensions the FT232RL is supplied in a rohs compliant 28 pin ssop package. the package is lead (pb) free and uses a ?green? compound. the package is fully compliant with european union directive 2002/95/ec. this package is nominally 5.30mm x 10.20mm body (7.80mm x 10.20mm including pins). the pins are on a 0.65 mm pitch. the above mechanical drawing shows the sso p - 28 package. all dimensions are in millimetres. the date code format is yyxx where xx = 2 digit week number, yy = 2 digit year number. this is followed by the revision number. the code xxxxxxxxxxxx is the manufacturing lot code. this only applies to devi ces manufactured after april 2009. 1 2 t y p 0 - 8 0 . 2 5 0 . 7 5 + / - 0 . 2 0 0 . 0 9 2 . 0 0 m a x 1 . 7 5 + / - 0 . 1 0 0 . 0 5 m i n 1 . 2 5 + / - 0 . 1 2 f t 2 3 2 r l y y x x - a 1 1 4 1 5 2 8 f t d i 5 . 3 0 + / - 0 . 3 0 7 . 8 0 + / - 0 . 4 0 1 0 . 2 0 + / - 0 . 3 0 1 . 0 2 t y p . 0 . 3 0 + / - 0 . 0 1 2 0 . 6 5 + / - 0 . 0 2 6 x x x x x x x x x x x x
copyright ? 2010 future technology devices international limited 36 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 9.2 qfn - 32 package dimensions figure 9 . 2 qfn - 32 package dimensions the ft232rq is supplied in a rohs compliant leadless qfn - 32 package. the package is lead ( pb ) fr ee, and uses a ?green? compound. the package is fully compliant with european union directive 2002/95/ec. this package is nominally 5.00mm x 5.00mm. the solder pads are on a 0.50mm pitch. the above mechanical drawing shows the qfn - 32 package. all dimension s are in millimetres. the centre pad on the base of the ft232rq is not internally connected, and can be left unconnected, or connected to ground (recommended). the date code format is yyxx where xx = 2 digit week number, yy = 2 digit year number. the code xxxxxxx is the manufacturing lot code. this only applies to devices manufactured after april 2009. i n d i c a t e s p i n # 1 ( l a s e r m a r k e d ) f t 2 3 2 r q 3 2 2 5 2 4 1 7 1 6 9 8 1 y y x x - a 5 . 0 0 0 + / - 0 . 0 7 5 5 . 0 0 0 + / - 0 . 0 7 5 3 . 2 0 0 + / - 0 . 1 0 0 3 . 2 0 0 + / - 0 . 1 0 0 0 . 5 0 0 0 . 2 5 0 + / - 0 . 0 5 0 0 . 5 0 0 + / - 0 . 0 5 0 0 . 1 5 0 m a x p i n # 1 i d 0 . 9 0 0 + / - 0 . 1 0 0 0 . 2 0 0 0 . 0 5 0 2 1 3 4 5 6 7 8 2 3 2 4 2 2 2 1 2 0 1 9 1 8 1 7 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 n o t e : t h e p i n # 1 i d i s c o n n e c t e d i n t e r n a l l y t o t h e d e v i c e s c e n t r a l h e a t s i n k a r e a . i t i s r e c o m m e n d e d t o g r o u n d t h e c e n t r a l h e a t s i n k a r e a o f t h e d e v i c e . 0 . 2 0 0 m i n d i m e n s i o n s i n m m . c e n t r a l h e a t s i n k a r e a f t d i x x x x x x x
copyright ? 2010 future technology devices international limited 37 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 9.3 qfn - 32 package typical pad layout figure 9 . 3 typical pad layout for qfn - 32 package 9.4 qfn - 32 package typical solder paste diagram figure 9 . 4 typical solder paste diagram for qfn - 32 package 2 . 5 + / - 0 . 0 3 7 5 2 . 5 + / - 0 . 0 3 7 5 1 17 25 0 . 500 0 . 30 0 . 200 min 0 . 500 +/ - 0 . 050 0 . 150 max 0 . 20 0 . 100 3 . 2 0 0 + / - 0 . 1 0 0 3 . 200 +/ - 0 . 100 2 . 50 2 . 50 optional gnd connection optional gnd connection 9
copyright ? 2010 future technology devices international limited 38 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 9.5 solder reflow profile the ft232r is supplied in pb free 28 ld ssop and qfn - 32 packages. the recomm ended solder reflow profile for both package options is shown in figure 9 . 5 . figure 9 . 5 ft232r solder reflow profile the recommended values for the solder reflow profile are detailed in table 9 . 1 . values are shown for both a completely pb free solder process (i.e. the ft232r is used with pb free solder), and for a non - pb free solder process (i.e. the ft232r is used with non - pb free so lder). profile feature pb free solder process non - pb free solder process average ramp up rate (t s to t p ) 3c / second max. 3c / second max. preheat - temperature min (t s min.) - temperature max (t s max.) - time (t s min to t s max) 150c 200c 60 to 12 0 seconds 100c 150c 60 to 120 seconds time maintained above critical temperature t l : - temperature (t l ) - time (t l ) 217c 60 to 150 seconds 183c 60 to 150 seconds peak temperature (t p ) 260c 240c time within 5c of actual peak temperature (t p ) 20 to 40 seconds 2 0 to 4 0 seconds ramp down rate 6c / second max. 6c / second max. time for t= 25c to peak temperature, t p 8 minutes max. 6 minutes max. table 9 . 1 reflow profile parameter values critical zone: when t is in the range t to t t e m p e r a t u r e , t ( d e g r e e s c ) time, t (seconds) 25 p t = 25 o c to t t p t p t l t preheat s t l ramp up l p ramp down t max s t min s
copyright ? 2010 future technology devices international limited 39 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 10 contact information head office C glasgow, uk future technology devices international limited unit 1, 2 seaward place centurion business park glasgow, g41 1hh united kingdom tel: +44 (0) 141 429 2777 fax: +44 (0) 141 429 2758 e - mail (sales) sales1@ftdichip.com e - mail (support) support1@ftdichip.com e - mail (general enquiries) admin1@ftdichip.com web site url http://www.ftdichip.com web shop url http://www.ftdichip.com branch office C taipei, taiwan future techn ology devices international limited (taiwan) 2f, no 516, sec. 1 neihu road taipei 114 taiwan, r.o.c. tel: +886 (0) 2 8791 3570 fax: +886 (0) 2 8791 3576 e - mail (sales) tw.sales1@ftdichip.com e - mail (support) tw.support1@ftdichip.com e - mail (general enquiries) tw.admin1@ftdichip.com web site url http://www.ftdichip.com branch office C hillsboro, oregon, usa future technology devices international limited (usa) 7235 nw evergreen parkway, suite 600 hillsboro, or 97123 - 5803 usa tel: +1 (503) 547 0988 fax: +1 (503) 547 0987 e - mail (sales) us.sales@ftdichip.com e - mail (support) us.admin@ftdichip.com web site url http://www.ftdichip.com branch office C shanghai, chin a future technology devices international limited (china) room 408, 317 xianxia road, changning district, shanghai, china tel: +86 (21) 62351596 fax: +86 (21) 62351595 e - mail (sales): cn.sales@ftdichip.com e - mail (support): cn .support@ftdichip .com e - mail (general enquiries): cn. admin1@ftdichip.com web site url: http://www.ftdichip.com distributor and sales representatives please visit the sales network page of the ftdi web site for the contact details of our distributor(s) and sales representative(s) in your country.
copyright ? 2010 future technology devices international limited 40 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 appendix a C references useful application notes http://www.ftdichip.com/documents/appnotes/an232r - 01_ft232rbitbangmodes.pdf http://www.ftdichip.com/documents/appnotes/an_107_advanceddriveroptions_an_000073.pdf http://www.ftdichip.com/documents/appnotes/an232r - 02_ft232rchipid.pdf http://www.ftdichip.com/documents/appnotes/an_121_ftdi_device_eeprom_user_area_usage.pdf http://www.ftdichip.com/documents/appnotes/an_120_aliasing_vcp_baud_rates.pdf http://www.ftdichip.com/documents/appnotes/an_10 0_using_the_ft232_245r_with_external_osc(ft_ 000067).pdf http://www.ftdichip.com/resources/utilities/an_126_user_guide_for_ft232_factory%20tes t%20utility. pdf http://www.ftdichip.com/documents/appnotes/an232b - 05_baudrates.pdf http://www.ftdichip.com/do cuments/installguides.htm
copyright ? 2010 future technology devices international limited 41 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 appendix b - list of figures and tables list of figures figure 2.1 ft232r block diagram ................................ ................................ ................................ ... 4 figure 3.1 ssop package pin out and schematic symbol ................................ .......................... 7 figure 3.2 qfn - 32 package pin out and schematic symbol ................................ .............................. 10 figure 6.1 bus powered configuration ................................ ................................ ........................... 23 figure 6.2 self powered configuration ................................ ................................ ........................... 24 figure 6.4 usb bus powered with +3.3v or +5v external logic power supply ................................ .... 26 figure 7.1 application example showing usb to rs232 converter ................................ ..................... 27 figure 7.2 application exa mple showing usb to rs485 converter ................................ .................... 28 figure 7.3 usb to rs422 converter configuration ................................ ................................ ........... 29 figure 7.4 usb to mcu uart interface ................................ ................................ .......................... 30 figure 7.5 dual led configuration ................................ ................................ ................................ 31 figure 7.6 single led configuration ................................ ................................ .............................. 31 figure 9.1 ssop - 28 package dimensions ................................ ................................ ....................... 35 figure 9.2 qfn - 32 package dimensions ................................ ................................ ......................... 36 figure 9.3 typical pad layout for qfn - 32 package ................................ ................................ .......... 37 figure 9.4 typical solder paste diagram for qfn - 32 package ................................ ........................... 37 figure 9.5 ft232r solder reflow profile ................................ ................................ ........................ 38 list of tables table 3.1 usb interface group ................................ ................................ ................................ ....... 7 table 3.2 power and ground group ................................ ................................ ................................ . 8 table 3.3 miscellaneous signal group ................................ ................................ .............................. 8 table 3.4 uart interface and cusb group (see note 3) ................................ ................................ .... 9 table 3.5 usb interface group ................................ ................................ ................................ ..... 10 ta ble 3.6 power and ground group ................................ ................................ ............................... 11 table 3.7 miscellaneous signal group ................................ ................................ ............................ 11 table 3.8 uart interface and cbus group (see note 3) ................................ ................................ .. 12 table 3.9 cbus configuration control ................................ ................................ ........................... 13 table 5.1 absolute maximum ratings ................................ ................................ ............................ 17 table 5.2 operating voltage and current ................................ ................................ ....................... 18 table 5.3 uart and cbus i/o pin characteristics (vccio = +5.0v, standard drive level) .................. 18 table 5.4 uart and cbus i/o pin characteristics (vccio = +3.3v, standard drive level) .................. 18 table 5.5 uart and cbus i/o pin characteristics (vccio = +2.8v, standard drive level) .................. 19 table 5.6 uart and cbus i/o pin characteristics (vccio = +1.8v, standard drive level) .................. 19 table 5.7 uart and cbus i/o pin characteristics (vccio = +5.0v, high drive level) ......................... 19 table 5.8 uart and cbus i/o pin characteristics (vccio = +3.3v, high drive level) ......................... 19 table 5.9 uart and cbus i/o pin characteristics (vccio = +2.8v, high drive level) ......................... 20 table 5.10 uart and cbus i/o pin characteristics (vccio = +1.8v, high drive level) ....................... 20
copyright ? 2010 future technology devices international limited 42 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 table 5.11 reset# and test pin characteristics ................................ ................................ ............ 20 table 5.12 usb i/o pin (usbdp, usbdm) characteristics ................................ ................................ . 21 table 5.13 eeprom characteristics ................................ ................................ ............................... 21 table 5.14 internal clock characteristics ................................ ................................ ....................... 21 table 5.15 osci, osco pin characteristics C see note 1 ................................ ................................ . 22 table 8.1 default internal eeprom configuration ................................ ................................ ............ 34 table 9.1 reflow profile parameter values ................................ ................................ ..................... 38
copyright ? 2010 future technology devices international limited 43 document no.: ft_000053 ft232r usb uart ic datasheet version 2.10 clearance no.: ftdi# 38 appendix c - revision history document title: usb uart ic ft232r document reference no.: ft_000053 clearance no.: ftdi# 38 product page: http://www.ftdichip.com/ftproducts.htm document feedback: send feedback version 0.90 initial datasheet created august 2005 version 0.96 revised pre - release datasheet october 2005 version 1.00 full datasheet released december 2005 version 1.02 minor revisions to datasheet december 2005 version 1.03 manufacturer id added to default eeprom configuration; buffer sizes added january 2006 version 1.04 qfn - 32 pad layout and solder paste diagrams added january 2006 v ersion 2.00 reformatted, updated package info, added notes for 3.3v operation; june 2008 part numbers, tid; added uart and cbus characteristics for +1.8v; corrected reset#; added mttf data; corrected the input switching threshold and input hysteresis va lues for vccio=5v version 2.01 corrected pin - out number in table3.2 for gnd pin18 . improved graphics on some figures . add packing details . changed usb suspend current spec from 500ua to 2.5ma corrected figure 9.2 qfn dimensions. aug ust 2008 version 2.0 2 corrected tape and reel quantities . added comment pwren# should be used with a 10k resistor pull up . replaced txden# with txden since it is acti ve high in various places. added lot number to the device markings . added 3v3 regulator output tolerance . clarified vcc operation and added section headed using an external oscillator updated company contact information. april 2009 version 2.0 3 corrected the rx/tx buffer definitions to be relative to the usb interface june 2009 version 2.0 4 additional dimensions added to qfn solder profile june 2009 version 2.0 5 modified package dimensions to 5.0 x 5.0 +/ - 0.075mm. december 2009 and solder paste diagram to 2.50 x 2.50 +/ - 0.0375mm added windows 7 32, 64 bit driver support added ft_prog utility references added appendix a - r eferences . figure 2.1 updated . updated usb - if tid for rev b version 2.06 updated s ection 6.2, figure 6.2 and the note , may 20 10 updated section 5.3, table 5.13, eeprom data retention time version 2.07 added usb certification logos july 2010 version 2.0 8 updated usb - if tid for rev c april 2011 version 2.09 corrected rev c tid number april 2011 version 2.10 table 3.9, a dded clock output frequency within 0.7% march 2012 edited table 3.9, txled# and txled# description added feedback links

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